Abstract

The reversible logic (RL) is emerging as a one of the promising techniques for design and development of computationally intensive arithmetic applications such as artificial intelligence (AI), machine-learning (ML), Robotics, etc. As the benefits of CMOS scaling is gradually diminishing and quest to achieve low power and high-performance has made the researchers to look into alternate logic styles and computation techniques to implement circuits. In recent years, the RL has emerged as a low power technique to design the circuits using emerging nanotechnologies such as quantum cellular automata (QCA), Spintronics, etc. On the other side, `approximate-computing’ technique has emerging as a most promising technique to design an energy-efficient circuits for error-tolerant applications such as image and video processing. The multiplier being critical element of image or video processing application plays an important role in the contribution of overall performance of the system under consideration. In this paper we present design and analysis of four novel approximate multipliers using approximate reversible logic gates that are reported in the recent literature. The proposed multipliers have been analyzed in terms of image-quality and circuit design metrics. From the analysis, it is found that the proposed multipliers are found to be superior in terms of quantum-cost, power, area, and image quality metrics.

Authors

S. Nitya¹, M. Nagabushanam², Prathima A³, M.C. Parameshwara⁴
Ramaiah Institute of Technology, India^1,2,4, Vemana Institute of Technology, India³

Keywords

Reversible Logic, Low Power, Full Adder, Quantum Gates, Quantum Cost