VLSI ARCHITECTURE FOR ERROR DETECTION AND CORRECTION BASED ON XOR AGAINST MULTIPLE CELL UPSETS WITH REDUCED REDUNDANT BITSV Bhanumathi, M Sunandini |
INFLUENCE OF PERSONALITY ON WORKPLACE SPIRITUALITY M. Subramaniam1, N. Panchanatham2 |
ACCEPTANCE OF AI IN ACADEMIC LIBRARIES IN ENGINEERING COLLEGES ACROSS INDIAS. Reshma, K. Rekha |
CNTFET BASED NOVEL 14T ADDER CELL FOR LOW POWER COMPUTATIONBalaji Ramakrishna S, Aswatha A R |
MORPHIC COMPUTING WITH MACHINE LEARNING FOR ENHANCED FRAUD DETECTION IN FINANCIAL APPLICATIONSN.P. Ponnuviji, M. Vigilson Prem |
LOW POWER DYNAMIC CMOS INVERTER AND SRAM CELL DESIGN USING LECTOR AND LECTOR-B TECHNIQUEVivek Harshey1,Pankaj Kumar Das2, Shivani Sharma3 |