DESIGN AND DEVELOPMENT OF SOC BASED NETWORK ON CHIP TOPOLOGIEST Nagalaxmi1, E Sreenivasa Rao2, P Chandrasekhar3 |
CONSTRICTED PARTICLE SWARM OPTIMIZATION FOR DESIGN OF COLLINEAR ARRAY OF UNEQUAL LENGTH DIPOLE ANTENNASBanani Basu, G.K. Mahanti |
INVESTIGATIONS ON PERFORMANCE CHARACTERISTICS OF FBMC: A PHY LAYER FOR NEXT GENERATION TELECOMR S S Maukthika, P Namratha, P Sri Hari |
REAL-TIME PERFORMANCE OPTIMIZATION OF ELECTRONIC EMBEDDED SYSTEMS USING DEEP REINFORCEMENT LEARNING ALGORITHMSN. Jagadeeswari1, R. Sudha2, M. Bhavani3 |
MAMMOGRAMS ANALYSIS USING SVM CLASSIFIER IN COMBINED TRANSFORMS DOMAINB.N. Prathibha, V. Sadasivam |
A NON-FEEDBACK EEG-BASED BRAIN COMPUTER INTERFACE (BCI) FOR COGNITIVE STATE CLASSIFICATION IN TIME DOMAINN. Raji Gopinathan1, Elizabeth Sherly2 |