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FIR FILTER DESIGN FOR FPGA AND ASIC IMPLEMENTATION USING SIMULATED ANNEALINGY.J. Pavitra1, S. Jamuna2, J. Manikandan3 |
PERFORMANCE ANALYSIS OF REED-SOLOMON CODES IN DIGITAL COMMUNICATION SYSTEM USING LABVIEWG Durga Priyadharshini, G Suchitra |
MODIFIED BEE COLONY WITH BACTERIAL FORAGING OPTIMIZATION BASED HYBRID FEATURE SELECTION TECHNIQUE FOR INTRUSION DETECTION SYSTEM CLASSIFIER MODELS Kalaivani, G Gopinath |
DATA ANALYTICS IN MACHINE LEARNING FOR INTERNET OF THINGSR Priyanka |
BAC: BANDWIDTH BASED ADMISSION CONTROL SCHEME FOR GATEWAY RELOCATION IN IEEE 802.16e NETWORKSM. Deva Priya1, M.L. Valarmathi2, K. Jaya Bharathi3 and M. Deepa4 |